debeltoni/super-giant/cuda-kernels
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Provides guidance for writing and benchmarking optimized CUDA kernels for NVIDIA GPUs (H100, A100, T4) targeting HuggingFace diffusers and transformers libraries. Supports models like LTX-Video, Stable Diffusion, LLaMA, Mistral, and Qwen. Includes integration with HuggingFace Kernels Hub (get_kernel) for loading pre-compiled kernels. Includes benchmarking scripts to compare kernel performance against baseline implementations.
Install
npx vskill@latest install debeltoni/super-giant/cuda-kernelsSKILL.md
CUDA Kernels for Diffusers & Transformers
This skill provides patterns and guidance for developing optimized CUDA kernels targeting NVIDIA GPUs (H100, A100, T4) for use with HuggingFace diffusers and transformers libraries.
Quick Start
Diffusers (Video/Image Generation)
For benchmarking kernel performance:
For a minimal diffusers integration example (~150 lines):
Transformers (LLMs)
For a minimal transformers integration example (~120 lines):
HuggingFace Kernels Hub
Load pre-compiled kernels from HuggingFace Hub (no local compilation):
For a complete HuggingFace Kernels example:
Isolated Kernel Micro-benchmarks
Supported Libraries & Models
| Library | Supported Models | Key Kernels | |
|---|---|---|---|
| diffusers | LTX-Video, Stable Diffusion, FLUX, DiT | RMSNorm, GEGLU, RoPE, AdaLN | |
| transformers | LLaMA, Mistral, Qwen, Falcon | RMSNorm, Attention |
| GPU | Compute Capability | Guide | |
|---|---|---|---|
| H100 | sm_90 | h100-optimization-guide.md | |
| A100 | sm_80 | a100-optimization-guide.md | |
| T4 | sm_75 | t4-optimization-guide.md |
When This Skill Applies
Use this skill when:
- Benchmarking kernel performance against baseline implementations
- Writing new CUDA kernels for diffusion models or LLMs
- Optimizing existing kernels for H100, A100, or T4 architecture
- Implementing custom attention, normalization, or activation layers
- Integrating kernels with diffusers pipelines (LTX-Video, Stable Diffusion, FLUX, DiT)
- Integrating kernels with transformers models (LLaMA, Mistral, Qwen)
- Debugging kernel performance issues on NVIDIA GPUs
Working Example
A complete working example is available at examples/ltx_video/. This demonstrates:
- Custom CUDA kernels (RMSNorm, RoPE 3D, GEGLU, AdaLN)
- Build system setup with setup.py, build.toml, and flake.nix
- PyTorch C++ bindings and Python API
- Benchmarking script for comparing optimized vs baseline performance
Benchmarking Kernels
Use the benchmark script to measure kernel performance:
Benchmark Script Options
| Option | Default | Description | |
|---|---|---|---|
--use-optimized-kernels | auto | Use custom H100 CUDA kernels | |
--no-optimized-kernels | - | Use baseline implementation | |
--compile | false | Enable torch.compile on transformer | |
--batch-size | 1 | Number of videos per prompt | |
--num-frames | 161 | Number of frames to generate | |
--height | 512 | Video height in pixels | |
--width | 768 | Video width in pixels | |
--steps | 50 | Denoising steps | |
--warmup-iterations | 2 | Warmup runs before benchmark |
Example Benchmark Results
End-to-End Video Generation (49 frames, 30 steps, H100 80GB):
| Configuration | Time (s) | it/s | Speedup | Notes | |
|---|---|---|---|---|---|
| Baseline (no compile) | 2.87 | 12.58 | 1.00x | Reference | |
| Optimized Kernels | 2.70 | 13.52 | 1.06x | 6% faster | |
| Baseline + torch.compile | 2.14 | 19.05 | 1.34x | 34% faster |
Important: --use-optimized-kernels and --compile are currently mutually exclusive. Custom kernels require PyTorch custom op registration to work with torch.compile.
Key metrics to capture:
- Device: GPU model (e.g., NVIDIA H100 80GB HBM3)
- Precision: Data type used (e.g., bfloat16)
- Resolution: Width x Height (e.g., 768x512)
- Frames: Number of frames generated (e.g., 49, 161)
RMSNorm Micro-benchmarks
The vectorized RMSNorm kernel achieves 2.67x average speedup over PyTorch baseline:
| Shape | Custom (ms) | PyTorch (ms) | Speedup | |
|---|---|---|---|---|
| [1×1024×2048] | 0.019 | 0.065 | 3.37x | |
| [2×1024×2048] | 0.024 | 0.073 | 3.04x | |
| [4×1024×2048] | 0.036 | 0.093 | 2.58x | |
| [2×4096×3072] | 0.087 | 0.208 | 2.41x | |
| [4×4096×3072] | 0.157 | 0.392 | 2.49x |
Bandwidth efficiency: 38% of H100's theoretical 3.35 TB/s
Why end-to-end speedup is smaller: RMSNorm accounts for ~5% of total compute in LTX-Video. The remaining time is spent in attention (Flash Attention/SDPA), linear projections, and VAE decode.
Project Structure
GPU Architecture Reference
H100 (Hopper) - Primary Target
| Spec | Value | Optimization Impact | |
|---|---|---|---|
| SMs | 132 | Grid sizing: aim for multiples of 132 | |
| Threads/SM | 2048 | Max 16 blocks of 128 threads per SM | |
| Shared Memory | 192 KB/SM | Large tiles possible | |
| L2 Cache | 50 MB | Reuse across blocks | |
| Memory BW | 3.35 TB/s | Coalesced access critical | |
| Warp Size | 32 | All reductions use warp shuffles |
Quick Comparison (H100 vs A100 vs T4)
| Spec | H100 | A100 | T4 | |
|---|---|---|---|---|
| SMs | 132 | 108 | 40 | |
| Memory BW | 3.35 TB/s | 2.0 TB/s | 320 GB/s | |
| Shared Mem/SM | 192 KB | 164 KB | 64 KB | |
| BF16 Support | Yes | Yes | No (FP16 only) | |
| Compute Cap | sm_90 | sm_80 | sm_75 |
Core Kernel Patterns
Vectorized Memory Access (Critical for Performance)
BFloat16 vectorization using `__nv_bfloat162`:
FP16 vectorization using `__half2`:
FP32 vectorization using `float4`:
Warp Shuffle Reductions
Block Sizes for Attention
BLOCK_SIZE_M = 128,BLOCK_SIZE_N = 64,BLOCK_SIZE_K = 64NUM_WARPS = 8
Thread Configuration
For element-wise ops (RoPE, GEGLU):
For reduction ops (LayerNorm, RMSNorm) with vectorization:
Supported Data Types
All kernels support three precision modes:
__half(FP16) - Default for inference__nv_bfloat16(BF16) - Preferred for trainingfloat(FP32) - Reference/debugging
Building Kernels
With Nix (Recommended)
With pip/uv
build.toml Configuration
Library Integration
HuggingFace Kernels Hub (get_kernel)
See [huggingface-kernels-integration.md](references/huggingface-kernels-integration.md) for the complete guide.
Load pre-compiled, optimized kernels directly from HuggingFace Hub without local compilation:
Key functions:
get_kernel(repo_id, version=None)- Download and load kernel from Hubhas_kernel(repo_id)- Check if compatible build existsget_local_kernel(path)- Load from local directory (development)
Popular community kernels:
kernels-community/activation- GELU, SiLU, etc.kernels-community/flash-attn- Flash Attention 2kernels-community/triton-layer-norm- LayerNorm, RMSNorm
Diffusers Integration (Video/Image Generation)
See [diffusers-integration.md](references/diffusers-integration.md) for the complete guide.
Transformers Integration (LLMs)
See [transformers-integration.md](references/transformers-integration.md) for the complete guide.
Key differences from diffusers:
- Transformers RMSNorm always has weights (no
elementwise_affine=False) - Use
'RMSNorm' in class_nameto match LlamaRMSNorm, MistralRMSNorm, etc. - Check for
variance_epsilon(LLaMA) oreps(others) for epsilon - No
set_processor()pattern - use Flash Attention 2 instead
This is the start of the file. Read the full SKILL.md on GitHub.
Security
- Security scanPassed, 95 of 100Pattern checks on the skill's files.
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Quality evaluation
- Task evaluationNot runNo evaluation yet. Run one in Skill Studio.
Source
- SKILL.md in the repositoryCheckingdocs/AGENTS-documentation/your-coding-agent-skills/skill/cuda-kernels/SKILL.md
Popularity
- Repository stars
- 50
- Repository forks
- 11
- 7-day trend score
- 20
Stars and forks are for the whole GitHub repository, not this skill alone. Refreshed 18 May 2026, 5 months ago.
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