kadirnar/kernel-agent/gpu-architectures

GPU architectures

Every agent prompt already has the section of its own GPU (# This GPU, picked by kernel_agent/gpu_arch.py from the compute capability). gpus.md has every family, one ## <family> [<key>] section each, and the sources they rest on:

On any GPU, the toolchain block's measured peaks and instruction rates come first; kernel-agent doctor probes tl.dot_scaled, TMA, PDL and green contexts.

Boards of one architecture differ too: skus.md has what tells them apart from measurements (datacenter vs GeForce fp32 accumulation, INT8 vs bf16, the sustained clock of a power-capped board), the NVIDIA A10 (sm_86) and the power-capped A10 / T4 / L4, datasheet numbers labelled.

Turing, Ampere and Ada in depth: turing.md, ampere.md and ada.md. Each holds the instruction forms per arch, the backends' behaviour (Triton, CuTe DSL, TileLang, PyTorch SDPA, cuBLASLt), datasheet rows per SKU, the code paths verified through PTX JIT and what is not measured on the family yet. Before relying on a number on such a GPU, follow measure-first.md: doctor, the instruction rates incl. fp32 vs fp16 accumulation, sustained clocks, and running an older arch's code path on a newer GPU.

An older GPU's code paths (__CUDA_ARCH__ branches, Triton's sm_8x / sm_75 lowering) can be checked for correctness on a newer one: kernel-agent eval|recheck|memcheck|doctor --smoke --emulate-arch sm_86 (KERNEL_AGENT_EMULATE_ARCH) runs that architecture's PTX through the driver's JIT with its facts (capability, shared memory per block). Timings there are not that GPU's, cuBLAS / cuDNN / SDPA / _scaled_mm / _int_mm run natively, CuTe DSL and TileLang only compile; NVRTC code must take its target from toolchain.nvrtc_kernel / nvrtc_target (the cuda-kernels skill).

Examples and sources

• Sources: the documentation-sources skill's sources.md, sections "CUDA C++ and PTX".
• Per-family sources: the ## Sources section of gpus.md.